Designs on bread boards or perf boards are cumbersome, to have neat placement of components without jumpers or wires a PCB (PCB Design Training in Bangalore) is designed. It also helps in providing physical stability and overall circuit is more reliable.

What software or EDA tools are you familiar with? What if schematic symbols and footprints are not available in component library?

Create them!
How do you verify schematic symbols or footprints?
cross verify with datasheets, print footprints and match with actual devices before production.
What are basic checks while laying out MCU based design
Power path:Ensure that the power flow tracks have sufficient trace width.
Oscillator circuit: Ensure oscillator is placed near to MCU pins. Distance depends on specific MCU. It is done so that MCU receives stable oscillations without noise.

What are units for measuring footprints?

  • Millimeter: SMD components
  • Mils:Through hole

What is Mil?

  • 1 mil is 1/1000 inch.

Why is it used?

The dimensions of most of the through hole components are in mils. e.g pitch between IC pins(100 mils), Width of ICs (300 mil, 600 mil) etc. Hence if measurement of these in mm will not round figures.

  •  Library creation
  • Board outline and mechanicals
  • Importing netlist
  • Design Rule settings
  • Component Placement
  •  Rounting
  •  Split plans
  •  Silkscreen and Assembly settings
  • Gerber Settings

What are the inputs you need to design a PCB?

  • We need schematic,bom and netlist(some pcb engineer generates netlist) from Hardware side and Board mechanicals from client i.e, board outline,mounting holes etc.
  • and another important thing that we need is PCB stackup it is based on complexity of the board for example if we are using fpga first we should know number of signal layers need for fpga signal breakout.

How to create footprint?

  • Footprint flow:

    • Padstack creation
    • pin placement
    • assembly outline
    • silkscreen outline
    • Place bound top (we can mention height of the here)
    • dfa bound top
    • no probe top
    • silk and assembly reference designator

    These are the basic things we need to create a footprint,follow IPC standards for proper guidelines.

Board mechanicals.

Draw board outline by considering client requirements,place mechanical hols and global fiducials.create route keepin and place keepin areas,

Questions that can be raised from this:

  • size of the mechanical holes that you have used in your design and clearances that you have given to these.
  • what are fiducials and use of these fiducials and types and differences between them.
  • Fiducial placement and clearances.
  • What are the clearances you have given from board outline to route and place keepin.

what are the errors you got while importing netlist?

  • pcb footprint not found.
  • pins mismatch between symbol and footprint etc.

How do you define design rules?

Design rules are nothing but creating tracewidth, spacing, vias limitations. Generally we get trace width and spacing details from stackup.

How do place components?

 Place major components first i.e connectors, BGAs, mejor ICs then place other sections.

  • How do you place connectors?

First check weather i.e right angle or straight.If it is right angle place at edge of the board and consider if there any recommendations from client. 

How do you plan routing and what are the parameters you consider while routing?

Placement routing plays  major  roles in pcb design, quality of the board depends on placement and routing, good placement and routing can reduce your board fabrication cost also.

Place components by considering routing strategy  and follow schematic  flow once your placement is done do fanout for all the components, route high speed interfaces and complex areas first and maintain ground reference plane for all high speed signals and make sure that every trace has reference plane and try to reduce vias on signals vias can change trace characteristic impedance.

Mentor Graphics Expedition, Power PCB (PADS) and Board Station:

We currently support WG2004, EXP 2005.1, EXP 2005.3, EXP 2007 versions of Expedition, versions 2005sp1, 2005sp2 and 2009 of PADS and Board Station versions EN2002, EN2004, BSTN2005, BSTN2006, and BSXE2006. PADS 2007 is currently under evaluation for future support, please contact us for more information.

Valor Enterprise 3000:  This is a cornerstone process tool for Freedom CAD to assure manufacturability and minimal delays in the fabrication process. We are a Valor Certified Design Partner.

Custom Programs: Over the past 10 years we have developed custom programs and scripts to gain efficiencies, improve quality and augment the current design tools.

What is the difference between a blind and buried via?

Blind vias are use to connect an inner layer to either the top or bottom layer. A buried via is used for connecting two inner layers. It does not go either to the top or the bottom layer. A regular via ( different from the blind and the buried via connects the top and the bottom layer and also passes through the inner layers.

Do not stop here. Go ahead and draw the diagram of the blind and the buried via.

There are many methods. A formula method gives a quick result, though it is not highly accurate. A 2D Field solver gives more accurate result. The Trace impedance depends upon the width of the trace, separation from the ground / power plane, and the relative permittivity of the material.

What is the use of a decoupling capacitor?

A decoupling capacitor is used to smoothen the power supply noise. It should be placed as close to the ICs for which it is intended as possible.

What is DRC? What Kind of DRC errors you find in PCB Design?

DRC stands for Design Rule checking. A PCB should not have any electrical failure before we tape out for the manufacturing. Common DRC errors include, trace to pad violation, pad to pad violation, component keep out violation. Additionally a PCB Design may have high speed design rule related constraints. This may include, length matching constraints, differential signal length matching constraint.

What are the things you should do you ensure design for compliance for EMI?

We should use common mode chokes for all cables connectors. The common mode chokes should be placed as close to the connector as possible. The Power and ground planes should be as close to each other as possible. The High speed signal should refer to a ground or power plane and should not cross a split plane. Stitching capacitor should be used in case split plane is used.

A large thermal pad is divided into four sections? What is the use of it?

The open area between the 4 sections lead to escape of the gases during the reflow and soldering process. It leads to better manufacturability.

The width of a trace is increased ? Will its characteristic impedance increase of decrease ?

The Capacitance per unit length of the trace increases and therefore, the characteristic impedance of the trace decreases.

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